Under some circumstances, dendrites and/or nanoparticles of conductive material may be formed between metal or other conductive material interconnects during fabrication of a semiconductor device. For example, where copper lines are formed by a damascene process, a polishing step is utilized to planarize the surface of the layer holding the damascene-formed lines. Typically, the polishing step involves a slurry or solution incorporating a grinding compound and/or chemical. The polishing process accordingly will produce small particles of the material being ground away which will remain suspended in the slurry. Consequently, the interconnect being polished will be immersed in a slurry having conductive particles suspended therein.
Under certain conditions, a voltage potential may appear across some or all of the interconnects. This voltage potential, in conjunction with chemical activity associated upon the interconnects in the slurry may cause a dendrite of conductive material to form on at least one of the interconnects. Additionally, such a dendrite may grow towards another interconnect and ultimately, make electrical contact with the other interconnect.
The interconnect towards which the dendrite grows will have a voltage potential opposite to the voltage potential of the interconnect producing the dendrite. The voltage potential on each interconnect driving the dendrite growth is produced by, for example, the structure of the device to which the interconnects are connected, and may not be necessarily directly related to the process at the device's surface.
A dendrite growth control circuit is disclosed in U.S. Pat. No. 7,109,584. This solution to control dendrite growth requires installation of an additional circuit in the semiconductor device.
U.S. Pat. No. 6,218,290 provides a solution to dendrite formation by chemically removing a portion of the surface of the semiconductor device after CMP.